Putting It All Together

Congratulations! You now know all the building blocks of YAML:

• Key-value pairs (Lesson 2) — name: "value"
• Comments (Lesson 2) — # notes for humans
• Data types (Lesson 2) — text, numbers, true/false
• Nesting (Lesson 3) — indentation creates groups
• Lists (Lesson 4) — dashes create bullet points
• Multi-line text (Lesson 5) — | and > for long text

In this lesson, we combine everything into one real file — the kind you would actually use in semiconductor design.

The USB Controller Chip

The book’s complete example describes a USB controller chip. It uses every concept you have learned — nested groups, key-value pairs with different data types, comments, and a list. Count the dots to see the indentation:

Understanding the Structure

Let’s break down what we just created:

1. Main container (usb_controller): This holds everything — 0 spaces
2. Information groups (chip_info, capabilities, specifications, required_tests): 2 spaces inside the container
3. Individual items (name, voltage, etc.): 4 spaces inside each group
4. A list (required_tests): dashes at 4 spaces, listing test names
5. Multi-line text (description: | and summary: >): text at 6 spaces inside chip_info

We used every concept from Part 1:

• Text (strings): "Simple USB Controller", "BGA"
• Numbers: 4, 3.3, 48, 64
• Booleans: true
• Lists: - "basic_connection_test"
• Multi-line with |: description keeps line breaks
• Multi-line with >: summary folds into one paragraph

Explore It Interactively

Click each section below to open it. Notice how the first three are nested groups (key-value pairs inside) and the last one is a simple list (dashes):

Think of it like organizing your backpack:

• Backpack = usb_controller (the main container)
• Pockets = chip_info, capabilities, specifications, required_tests (the groups)
• Items in pockets = name, voltage, "basic_connection_test", etc.

A real chip-flow YAML

The USB example above shows the structure. Here is what the same structure looks like for a real synthesis run — the kind of file you would actually hand to a tool like Synopsys DC or Cadence Genus:

Notice — nothing new. It is the same building blocks:

• Groups (design, technology, constraints, options)
• Lists (rtl_files, liberty_files, sdc_files)
• Numbers (clock_period_ns: 0.8), strings ("7nm"), booleans (true)
• Comments to label what is going on

When you read a config from your CAD team, this is what you will see. The keys change (top_module, liberty_files, clock_period_ns) but the shape is exactly what you just learned.

What You Have Learned in Part 1

You can now read and write any YAML file. Everything in YAML is built from just these pieces:

In Part 2, we will learn how to avoid mistakes and validate your YAML files.